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? semiconductor components industries, llc, 2014 june, 2014 ? rev. 6 1 publication order number: ntmfd4901nf/d ntmfd4901nf dual n-channel power mosfet with integrated schottky 30 v, high side 18 a / low side 30 a, dual n?channel so8fl features ? co?packaged power stage solution to minimize board space ? low side mosfet with integrated schottky ? minimized parasitic inductances ? optimized devices to reduce power losses ? these devices are pb?free, halogen free/bfr free and are rohs compliant applications ? dc?dc converters ? system voltage rails ? point of load dfn8 case 506bx marking diagram http://onsemi.com v (br)dss r ds(on) max i d max q1 top fet 30 v 6.5 m @ 10 v 18 a 10 m @ 4.5 v (8) g2 s2 (5, 6, 7) q2 bottom fet 30 v 2.35 m @ 10 v 30 a 3.5 m @ 4.5 v (1) g1 s1/d2 (10) d1 (2, 3, 4, 9) 4901nf = specific device code a = assembly location y = year w = work week zz = lot traceability see detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. ordering information 1 4901nf aywzz 1 10 9 1 2 3 4 8 7 6 5 pin connections d1 s1/d2 g1 d1 d1 d1 g2 s2 s2 s2 (bottom view)
ntmfd4901nf http://onsemi.com 2 maximum ratings (t j = 25 c unless otherwise stated) parameter symbol value unit drain?to?source v oltage q1 v dss 30 v drain?to?source v oltage q2 gate?to?source v oltage q1 v gs 20 v gate?to?source v oltage q2 continuous drain current r ja (note 1) steady state t a = 25 c q1 i d 13.5 a t a = 85 c 9.7 t a = 25 c q2 23.4 t a = 85 c 16.9 power dissipation r ja (note 1) t a = 25 c q1 p d 1.90 w q2 2.07 continuous drain current r ja 10 s (note 1) t a = 25 c q1 i d 18.2 a t a = 85 c 13.1 t a = 25 c q2 30.3 t a = 85 c 21.8 power dissipation r ja 10 s (note 1) t a = 25 c q1 p d 3.45 w q2 3.45 continuous drain current r ja (note 2) t a = 25 c q1 i d 10.3 a t a = 85 c 7.4 t a = 25 c q2 17.9 t a = 85 c 12.9 power dissipation r ja (note 2) t a = 25 c q1 p d 1.10 w q2 1.20 pulsed drain current t a = 25 c t p = 10 s q1 i dm 60 a q2 100 operating junction and storage temperature q1 t j , t stg ?55 to +150 c q2 source current (body diode) q1 i s 3.4 a q2 4.9 drain to source dv/dt dv/dt 6 v/ns single pulse drain?to?source avalanche energy (t j = 25c, v dd = 50 v, v gs = 10 v, i l = xx a pk , l = 0.1 mh, r g = 25 ) 24 a q1 eas 28.8 mj 48 a q2 eas 115 lead temperature for soldering purposes (1/8? from case for 10 s) t l 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. surface?mounted on fr4 board using 1 sq?in pad, 2 oz cu. 2. surface?mounted on fr4 board using the minimum recommended pad size of 100 mm 2 .
ntmfd4901nf http://onsemi.com 3 thermal resistance maximum ratings parameter fet symbol value unit junction?to?ambient ? steady state (note 3) q1 r ja 65.9 c/w q2 60.5 junction?to?ambient ? steady state (note 4) q1 r ja 113.2 q2 104 junction?to?ambient ? (t 10 s) (note 3) q1 r ja 36.2 q2 36.2 3. surface?mounted on fr4 board using 1 sq?in pad, 2 oz cu. 4. surface?mounted on fr4 board using the minimum recommended pad size of 100 mm 2 . electrical characteristics (t j = 25 c unless otherwise specified) parameter fet symbol test condition min typ max unit off characteristics drain?to?source break- down voltage q1 v (br)dss v gs = 0 v, i d = 250 a 30 v q2 v gs = 0 v, i d = 1 ma 30 drain?to?source break- down voltage temperature coefficient q1 v (br)dss / t j 18 mv / c q2 15 zero gate voltage drain current q1 i dss v gs = 0 v, v ds = 24 v t j = 25 c 1 a t j = 125 c 10 q2 v gs = 0 v, v ds = 24 v t j = 25 c 500 gate?to?source leakage current q1 i gss v gs = 0 v, vds = 20 v 100 na q2 100 on characteristics (note 5) gate threshold voltage q1 v gs(th) v gs = v ds , i d = 250 a 1.2 2.2 v q2 1.2 2.2 negative threshold temper- ature coefficient q1 v gs(th) / t j 4.5 mv / c q2 4.0 drain?to?source on resist- ance q1 r ds(on) v gs = 10 v i d = 10 a 5.2 6.5 m v gs = 4.5 v i d = 10 a 8.0 10 q2 v gs = 10 v i d = 20 a 1.9 2.35 v gs = 4.5 v i d = 20 a 2.8 3.5 forward transconductance q1 g fs v ds = 1.5 v, i d = 10 a 28 s q2 45 5. pulse test: pulse width 300 s, duty cycle 2%. 6. switching characteristics are independent of operating junction temperatures.
ntmfd4901nf http://onsemi.com 4 electrical characteristics (t j = 25 c unless otherwise specified) parameter unit max typ min test condition symbol fet charges, capacitances & gate resistance input capacitance q1 c iss v gs = 0 v, f = 1 mhz, v ds = 15 v 1150 pf q2 2950 output capacitance q1 c oss 360 q2 1100 reverse capacitance q1 c rss 105 q2 82 total gate charge q1 q g(tot) v gs = 4.5 v, v ds = 15 v; i d = 10 a 9.7 nc q2 20 threshold gate charge q1 q g(th) 1.1 q2 2.7 gate?to?source charge q1 q gs 3.3 q2 7.3 gate?to?drain charge q1 q gd 3.7 q2 5.3 total gate charge q1 q g(tot) v gs = 10 v, v ds = 15 v; i d = 10 a 19.1 nc q2 42.7 switching characteristics (note 6) turn?on delay time q1 t d(on) v gs = 4.5 v, v ds = 15 v, i d = 10 a, r g = 3.0 9.0 ns q2 14 rise time q1 t r 15 q2 16 turn?off delay time q1 t d(off) 14 q2 25 fall time q1 t f 4.0 q2 7.0 switching characteristics (note 6) turn?on delay time q1 t d(on) v gs = 10 v, v ds = 15 v, i d = 10 a, r g = 3.0 6.0 ns q2 10 rise time q1 t r 14 q2 15 turn?off delay time q1 t d(off) 17 q2 32 fall time q1 t f 3.0 q2 5.0 5. pulse test: pulse width 300 s, duty cycle 2%. 6. switching characteristics are independent of operating junction temperatures.
ntmfd4901nf http://onsemi.com 5 electrical characteristics (t j = 25 c unless otherwise specified) parameter unit max typ min test condition symbol fet drain?source diode characteristics forward voltage q1 v sd v gs = 0 v, i s = 3 a t j = 25 c 0.75 1.0 v t j = 125 c 0.62 q2 v gs = 0 v, i s = 2 a t j = 25 c 0.45 0.70 t j = 125 c 0.37 reverse recovery time q1 t rr v gs = 0 v, d is /d t = 100 a/ s, i s = 3 a 23 ns q2 40 charge time q1 ta 12 q2 21 discharge time q1 tb 11 q2 19 reverse recovery charge q1 q rr 12 nc q2 40 package parasitic values source inductance q1 l s t a = 25 c 0.38 nh q2 0.65 drain inductance q1 l d 0.054 nh q2 0.007 gate inductance q1 l g 1.5 nh q2 1.5 gate resistance q1 r g 0.8 q2 0.8 5. pulse test: pulse width 300 s, duty cycle 2%. 6. switching characteristics are independent of operating junction temperatures. ordering information device package shipping ? ntmfd4901nft1g dfn8 (pb?free) 1500 / tape & reel NTMFD4901NFT3G dfn8 (pb?free) 5000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ntmfd4901nf http://onsemi.com 6 typical characteristics ? q1 figure 1. on?region characteristics figure 2. transfer characteristics v ds , drain?to?source voltage (v) v gs , gate?t o?source voltage (v) 5 4 3 2 1 0 0 10 20 25 5 30 4 3 2 1 0 0 5 10 25 30 40 50 figure 3. on?resistance vs. gate?to?source resistance figure 4. on?resistance vs. drain current and gate voltage v gs , gate?t o?source voltage (v) i d , drain current (a) 9 810 7 6 5 4 2 0.002 0.006 0.008 0.010 0.014 0.016 0.020 30 25 20 10 5 0 0.003 0.004 0.005 0.006 0.008 0.009 0.010 figure 5. on?resistance variation with temperature figure 6. drain?to?source leakage current vs. voltage t j , junction temperature ( c) v ds , drain?to?source voltage (v) 125 100 75 50 25 0 ?25 ?50 0.6 1.2 1.4 1.6 1.8 30 25 20 15 10 0 10 100 1,000 10,000 i d , drain current (a) i d , drain current (a) r ds(on) , drain?to?source resistance ( ) r ds(on) , drain?to?source resistance ( ) r ds(on) , drain?to?source resistance (normalized) i dss , leakage (na) 15 35 40 t j = 25 c v gs = 2.4 v 3.0 v 3.2 v 2.8 v 4.5 v 10 v t j = 25 c v ds 5 v t j = 125 c t j = ?55 c 15 20 35 45 0.004 0.012 0.018 i d = 10 a t j = 25 c 15 40 35 0.007 t = 25 c v gs = 4.5 v v gs = 10 v 150 i d = 10 a v gs = 10 v 0.8 1.0 v gs = 0 v t j = 125 c t j = 150 c 3 5 3.4 v 3.6 v 3.8 v
ntmfd4901nf http://onsemi.com 7 typical characteristics ? q1 figure 7. capacitance variation figure 8. gate?to?source and drain?to?source voltage vs. total charge v ds , drain?to?source voltage (v) qg, total gate charge (nc) 30 25 20 15 10 5 0 0 200 400 800 1000 1200 1400 1600 18 14 12 6 4 2 0 0 1 3 5 6 8 9 11 figure 9. resistive switching time variation vs. gate resistance figure 10. diode forward voltage vs. current r g , gate resistance ( ) v sd , source?to?drain voltage (v) 100 10 1 1 10 100 1000 0.9 0.8 0.0 0.7 0.6 0.5 0.4 0.3 0 1 2 3 4 5 6 c, capacitance (pf) v gs , gate?t o?source voltage (v) t, time (ns) i s , source current (a) 600 t j = 25 c v gs = 0 v c iss c oss c rss 810 16 20 2 4 7 10 i d = 10 a t j = 25 c qt qgs qgd v gs = 10 v v dd = 15 v i d = 10 a t d(off) t d(on) t f t r t j = 25 c v gs = 0 v 7 8 9 10 0.1 0.2 0.01 0.1 1 10 100 1000 0.01 0.1 1 10 100 figure 11. maximum rated forward biased safe operating area v ds , drain?to?source voltage (v) i d , drain current (a) r ds(on) limit thermal limit package limit 0 v v gs 20 v single pulse t a = 25 c single pulse 1 ms 10 s 10 ms dc 100 s
ntmfd4901nf http://onsemi.com 8 typical characteristics ? q1 0.01 0.1 1 10 100 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 0.1 0.2 0.02 d = 0.5 0.05 0.01 single pulse thermal resistance, r ja ( c/w) t, time (s) figure 12. thermal response
ntmfd4901nf http://onsemi.com 9 typical characteristics ? q2 figure 13. on?region characteristics figure 14. transfer characteristics v ds , drain?to?source voltage (v) v gs , gate?t o?source voltage (v) 5 4 3 2 1 0 0 10 20 25 5 30 3.5 3 2 1 0 0 10 20 50 60 figure 15. on?resistance vs. gate?to?source resistance figure 16. on?resistance vs. drain current and gate voltage v gs , gate?t o?source voltage (v) i d , drain current (a) 9 810 7 6 5 4 2 0 0.010 0.015 0.020 30 25 20 10 5 0 0.0010 0.0015 0.0020 0.0025 0.0035 0.0040 figure 17. on?resistance variation with temperature figure 18. drain?to?source leakage current vs. voltage t j , junction temperature ( c) v ds , drain?to?source voltage (v) 125 100 75 50 25 0 ?25 ?50 0.6 1.2 1.4 1.6 1.8 30 25 20 15 10 0 1e?6 1e?5 1e?4 1e?2 i d , drain current (a) i d , drain current (a) r ds(on) , drain?to?source resistance ( ) r ds(on) , drain?to?source resistance ( ) r ds(on) , drain?to?source resistance (normalized) i dss , leakage (a) 15 35 40 t j = 25 c v gs = 2.4 v 3.0 v 2.8 v 4.5 v 10 v t j = 25 c v ds 5 v t j = 125 c t j = ?55 c 30 40 0.005 i d = 10 a t j = 25 c 15 40 35 0.0030 v gs = 4.5 v v gs = 10 v 150 i d = 20 a v gs = 10 v 0.8 1.0 v gs = 0 v t j = 125 c t j = 150 c 3 5 3.2 v 3.4 v 45 50 2.5 1.5 0.5 50 45 1e?3 t j = 25 c
ntmfd4901nf http://onsemi.com 10 typical characteristics ? q2 figure 19. capacitance variation figure 20. gate?to?source and drain?to?source voltage vs. total charge v ds , drain?to?source voltage (v) qg, total gate charge (nc) 30 25 20 15 10 5 0 0 500 1000 2000 2500 3000 3500 4000 4 5 35 30 15 10 5 0 0 1 3 5 6 8 9 11 figure 21. resistive switching time variation vs. gate resistance figure 22. diode forward voltage vs. current r g , gate resistance ( ) v sd , source?to?drain voltage (v) 100 10 1 1 10 100 1000 0.0 0 .7 0.6 0.5 0.4 0.3 0 1 2 3 4 5 6 c, capacitance (pf) v gs , gate?t o?source voltage (v ) t, time (ns) i s , source current (a) 1500 t j = 25 c v gs = 0 v c iss c oss c rss 20 25 40 2 4 7 10 i d = 10 a t j = 25 c qt qgs qgd v gs = 10 v v dd = 15 v i d = 10 a t d(off) t d(on) t f t r t j = 25 c v gs = 0 v 7 8 9 10 0.1 0.2 0.01 0.1 1 10 100 1000 0.01 0.1 1 10 100 figure 23. maximum rated forward biased safe operating area v ds , drain?to?source voltage (v) i d , drain current (a) r ds(on) limit thermal limit package limit 0 v v gs 20 v single pulse t a = 25 c single pulse 1 ms 10 s 10 ms dc 100 s
ntmfd4901nf http://onsemi.com 11 typical characteristics ? q2 0.01 0.1 1 10 100 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 0.1 0.2 0.02 d = 0.5 0.05 0.01 single pulse thermal resistance, r ja ( c/w) t, time (s) figure 24. thermal response
ntmfd4901nf http://onsemi.com 12 package dimensions h ??? 12 dfn8 5x6, 1.27p dual flag (so8fl?dual?asymmetrical) case 506bx issue c notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimensions b and b1 apply to plated features and are measured between 0.15 and 0.25 mm from terminal tips. 4. coplanarity applies to the exposed pads as well as the terminals. 5. dimensions d1 and e1 do not include mold flash, protrusions, or gate burrs. 6. seating plane is defined by the terminals. a1 is defined as the distance from the seating plane to the lowest point on the package body. 1234 5 6 top view side view bottom view d1 e1 h d e b a 0.20 c 0.20 c 2x 2x dim min millimeters a 0.90 a1 0.00 b 0.41 c 0.23 d 5.15 bsc d1 4.50 d2 3.50 e 6.15 bsc e1 5.50 e2 2.27 e 1.27 bsc l 0.35 a 0.10 c 0.10 c 14 8 e d2 e3 e2 l detail a a1 c 4x 5 max 1.10 0.05 0.61 0.33 5.10 4.22 6.10 2.67 0.55 7 8 pin one identifier note 4 c seating plane detail a note 6 e3 0.82 1.22 b1 0.41 0.61 g detail b detail b g 0.63 bsc g1 1.72 bsc 8x b a 0.10 b c 0.05 c note 3 detail c 6x b1 note 3 0.10 ref e/2 a 0.10 b c a 0.10 b c g1 detail c *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 1.27 0.64 0.69 2.68 5.35 8x pitch 6.48 1.22 dimension: millimeters 4x recommended 2.23 1.97 0.69 4x package outline on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. ntmfd4901nf/d p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative

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